Surrey Nanosystems Ltd
Surrey Nanosystems (SNS) produces highly advanced systems and processes for growing Carbon nanotubes (CNTs).
SNS' unique ability to grow CNTs consistently at low temperatures represents an important breakthrough both for the future manufacture of high performance semiconductor chips and for the rapidly developing field of nanoelectronics. SNS' technology is based on proprietary intellectual property developed by the Company and in association with the Advanced Technology Institute (ATI) at the University of Surrey.
Most of the remarkable improvement trends in the semiconductor industry over the past 40 years have resulted principally from the industry's ability to exponentially decrease the minimum feature sizes used to fabricate integrated circuits. The most frequently cited trend is usually expressed as Moore's Law (that is, the number of transistors per chip doubles roughly every 24 months).
Currently electrical signals are transmitted across and within each layer of the chip and between layers using conductors such as copper. These interconnects (or Vias) are currently being produced at scales as small as 45 nanometres (nm) wide. According to international forecasts and from trends described in the International Technology Roadmap for Semiconductors (ITRS - the industry's global guide to future scaling and technology requirements) it is expected that next generation interconnects will be reduced to 32 nm, then by 2012 to 22 nm and then to 16 nm (the latter by about 2014).
With shrinking chip features, by the 22nm level and below the issues related to resistance, electrical leakage and heat build-up in the chip are seen as major road blocks to progress. Currently copper provides an acceptable performance at levels of 45nm and reasonably well at 32nm, but it does lose efficiency at smaller geometries.
For Moore's Law to continue the industry must find new materials and technologies to overcome these scaling issues. Currently SNS is the only company with technology capable of reliably growing carbon nanotubes on silicon wafers at temperatures below the critical threshold of 350 deg C, required to prevent damage to the wafer.
The goal for SNS is to have its processes as a core technology used by the major semiconductor chip manufacturers to achieve the next generation phase of size reduction. Rather than attempt to do this directly, SNS has started to develop relationships with two of the leading semiconductor manufacturing equipment suppliers in the sector, with a view to joint development and scaling of the process and equipment to meet high volume production requirements. SNS aims to develop partnerships like this over 2009 and 2010 in order to jointly help develop commercial scale versions of the SNS machines, and then to use those partners to sell directly to the established semiconductor manufacturing companies.
The semiconductor industry spends over $50 billion a year on capital equipment. A semiconductor fabrication plant (fab) where semiconductor chips are manufactured can cost $1bn to $4bn per facility, requiring hundreds of pieces of manufacturing equipment inside with individual tool prices varying between $500K to $20m. SNS is currently manufacturing its first machines for installation and plans to shortly release a series of technical publications describing some of the advances that have been made.